[dbg] Add endian order operations
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@@ -1,15 +0,0 @@
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/// read a 24bit endian value, and place it in a u32 num
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pub fn read_big_endian_tribyte(input:&[u8;3]) ->u32{
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todo!()
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}
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pub fn read_big_endian_byte_array(input:&[u8]) ->u32{
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todo!()
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}
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/// Get 24 bit big endian slice
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pub fn get_big_endian(input:u32)->[u8;3]{
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todo!()
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}
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@@ -1,32 +1,42 @@
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use crate::emu::mmu::Memory;
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use crate::misc::endian::MemoryOperations;
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#[derive(Debug, Copy, Clone)]
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pub struct MemoryMappedIO {
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keyboard_bits: [u8;2],
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//FIXME use a keyboard
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keyboard_bytes: [u8;2],
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program_counter: [u8; 3],
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//FIXME use a device
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pixel_reg: u8,
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//FIXME use a device
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audio_sample_address_base: [u8; 2],
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}
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impl MemoryMappedIO {
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pub fn new() -> MemoryMappedIO {
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MemoryMappedIO {
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keyboard_bits: [0,0],
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keyboard_bytes: [0,0],
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program_counter: [0, 0, 0],
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pixel_reg: 0,
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audio_sample_address_base: [0, 0],
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}
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}
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}
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// 2 byte keyboard bits
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const KEYBOARD_BIT_START: u32 = 0;
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const KEYBOARD_BIT_END: u32 = 1;
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// 3 bytes PC
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const PC_START_ADDR: u32 = 2;
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const PC_LEN: u32 = 3;
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const PC_END_ADDR: u32 = PC_START_ADDR + PC_LEN - 1;
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// 1 byte pixel base reg
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const PIXEL_BASE: u32 = 5;
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// 2 byte audio sample base reg
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const AUDIO_SAMPLE_BASE_START: u32 = 6;
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const AUDIO_SAMPLE_BASE_LEN: u32 = 2;
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const AUDIO_SAMPLE_BASE_END: u32 = AUDIO_SAMPLE_BASE_START + AUDIO_SAMPLE_BASE_LEN - 1;
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@@ -36,13 +46,15 @@ impl Memory for MemoryMappedIO {
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match address {
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KEYBOARD_BIT_START..=KEYBOARD_BIT_END => {
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let addr_usize = address as usize;
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log::trace!("Fetching keyboard bits segment {}",addr_usize);
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self.keyboard_bits[addr_usize]
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let keyboard_byte = self.keyboard_bytes[addr_usize];
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log::trace!("Fetching keyboard({}) byte segment {} -> {}",MemoryOperations::read_big_endian_u16(&self.keyboard_bytes),address,keyboard_byte);
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keyboard_byte
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},
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PC_START_ADDR..=PC_END_ADDR => {
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let pc_index = (address - PC_START_ADDR) as usize;
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log::trace!("Fetching PC {:?} bit segment {}",self.program_counter,pc_index);
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self.program_counter[pc_index]
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let pc_byte = self.program_counter[pc_index];
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log::trace!("Fetching PC({}) byte segment {} -> {}",MemoryOperations::read_big_endian_u24(&self.program_counter),pc_index,pc_byte);
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pc_byte
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},
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PIXEL_BASE => {
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log::trace!("Fetching pixel base reg {}",self.pixel_reg);
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@@ -1,8 +1,10 @@
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use crate::emu::iomem::MemoryMappedIO;
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use crate::emu::mem::RamMemory;
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// 8 bytes that are memory mapped i/o
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pub const MMAPPEDIO_END: u32 = RAM_MEM_START-1;
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pub const RAM_MEM_START:u32 = 8;
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/// Last index of ram
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pub const RAM_MEM_END: u32 = 2<<24 - 1;
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///
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@@ -1,5 +1,4 @@
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pub mod cpu;
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pub mod mmu;
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pub mod mem;
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mod endian;
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pub mod iomem;
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@@ -5,6 +5,7 @@ use crate::emu::mmu::{Memory, MappedMemory};
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mod emu;
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mod args;
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mod misc;
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fn main() {
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SimpleLogger::new().init().unwrap();
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18
src/misc/endian.rs
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18
src/misc/endian.rs
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@@ -0,0 +1,18 @@
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use byteorder::{BigEndian, ByteOrder};
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pub struct MemoryOperations();
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impl MemoryOperations {
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/// read a 24bit endian value, and place it in a u32 num
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pub fn read_big_endian_u24(input: &[u8; 3]) -> u32 {
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BigEndian::read_u24(input)
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}
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pub fn read_big_endian_u16(input: &[u8; 2]) -> u16 {
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BigEndian::read_u16(input)
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}
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/// Write 24-bit endian number into slice
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pub fn write_big_endian_u24(input: u32, output_slice: &mut [u8; 3]) {
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BigEndian::write_u24(output_slice, input);
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}
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}
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1
src/misc/mod.rs
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1
src/misc/mod.rs
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@@ -0,0 +1 @@
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pub mod endian;
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