[dbg] Add endian order operations

This commit is contained in:
2024-02-17 08:44:14 +05:30
parent 9314888e99
commit 757d01fc25
9 changed files with 49 additions and 23 deletions

7
Cargo.lock generated
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@@ -54,11 +54,18 @@ dependencies = [
name = "byte-pusher-emu" name = "byte-pusher-emu"
version = "0.1.0" version = "0.1.0"
dependencies = [ dependencies = [
"byteorder",
"clap", "clap",
"log", "log",
"simple_logger", "simple_logger",
] ]
[[package]]
name = "byteorder"
version = "1.5.0"
source = "registry+https://github.com/rust-lang/crates.io-index"
checksum = "1fd0f2584146f6f2ef48085050886acf353beff7305ebd1ae69500e27c67f64b"
[[package]] [[package]]
name = "clap" name = "clap"
version = "4.5.1" version = "4.5.1"

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@@ -8,4 +8,5 @@ edition = "2021"
[dependencies] [dependencies]
clap = { version = "4.5", features = ["derive"] } clap = { version = "4.5", features = ["derive"] }
log = "0.4.20" log = "0.4.20"
simple_logger = "4.3" simple_logger = "4.3"
byteorder = "1.5"

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@@ -1,15 +0,0 @@
/// read a 24bit endian value, and place it in a u32 num
pub fn read_big_endian_tribyte(input:&[u8;3]) ->u32{
todo!()
}
pub fn read_big_endian_byte_array(input:&[u8]) ->u32{
todo!()
}
/// Get 24 bit big endian slice
pub fn get_big_endian(input:u32)->[u8;3]{
todo!()
}

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@@ -1,32 +1,42 @@
use crate::emu::mmu::Memory; use crate::emu::mmu::Memory;
use crate::misc::endian::MemoryOperations;
#[derive(Debug, Copy, Clone)] #[derive(Debug, Copy, Clone)]
pub struct MemoryMappedIO { pub struct MemoryMappedIO {
keyboard_bits: [u8;2], //FIXME use a keyboard
keyboard_bytes: [u8;2],
program_counter: [u8; 3], program_counter: [u8; 3],
//FIXME use a device
pixel_reg: u8, pixel_reg: u8,
//FIXME use a device
audio_sample_address_base: [u8; 2], audio_sample_address_base: [u8; 2],
} }
impl MemoryMappedIO { impl MemoryMappedIO {
pub fn new() -> MemoryMappedIO { pub fn new() -> MemoryMappedIO {
MemoryMappedIO { MemoryMappedIO {
keyboard_bits: [0,0], keyboard_bytes: [0,0],
program_counter: [0, 0, 0], program_counter: [0, 0, 0],
pixel_reg: 0, pixel_reg: 0,
audio_sample_address_base: [0, 0], audio_sample_address_base: [0, 0],
} }
} }
} }
// 2 byte keyboard bits
const KEYBOARD_BIT_START: u32 = 0; const KEYBOARD_BIT_START: u32 = 0;
const KEYBOARD_BIT_END: u32 = 1; const KEYBOARD_BIT_END: u32 = 1;
// 3 bytes PC
const PC_START_ADDR: u32 = 2; const PC_START_ADDR: u32 = 2;
const PC_LEN: u32 = 3; const PC_LEN: u32 = 3;
const PC_END_ADDR: u32 = PC_START_ADDR + PC_LEN - 1; const PC_END_ADDR: u32 = PC_START_ADDR + PC_LEN - 1;
// 1 byte pixel base reg
const PIXEL_BASE: u32 = 5; const PIXEL_BASE: u32 = 5;
// 2 byte audio sample base reg
const AUDIO_SAMPLE_BASE_START: u32 = 6; const AUDIO_SAMPLE_BASE_START: u32 = 6;
const AUDIO_SAMPLE_BASE_LEN: u32 = 2; const AUDIO_SAMPLE_BASE_LEN: u32 = 2;
const AUDIO_SAMPLE_BASE_END: u32 = AUDIO_SAMPLE_BASE_START + AUDIO_SAMPLE_BASE_LEN - 1; const AUDIO_SAMPLE_BASE_END: u32 = AUDIO_SAMPLE_BASE_START + AUDIO_SAMPLE_BASE_LEN - 1;
@@ -36,13 +46,15 @@ impl Memory for MemoryMappedIO {
match address { match address {
KEYBOARD_BIT_START..=KEYBOARD_BIT_END => { KEYBOARD_BIT_START..=KEYBOARD_BIT_END => {
let addr_usize = address as usize; let addr_usize = address as usize;
log::trace!("Fetching keyboard bits segment {}",addr_usize); let keyboard_byte = self.keyboard_bytes[addr_usize];
self.keyboard_bits[addr_usize] log::trace!("Fetching keyboard({}) byte segment {} -> {}",MemoryOperations::read_big_endian_u16(&self.keyboard_bytes),address,keyboard_byte);
keyboard_byte
}, },
PC_START_ADDR..=PC_END_ADDR => { PC_START_ADDR..=PC_END_ADDR => {
let pc_index = (address - PC_START_ADDR) as usize; let pc_index = (address - PC_START_ADDR) as usize;
log::trace!("Fetching PC {:?} bit segment {}",self.program_counter,pc_index); let pc_byte = self.program_counter[pc_index];
self.program_counter[pc_index] log::trace!("Fetching PC({}) byte segment {} -> {}",MemoryOperations::read_big_endian_u24(&self.program_counter),pc_index,pc_byte);
pc_byte
}, },
PIXEL_BASE => { PIXEL_BASE => {
log::trace!("Fetching pixel base reg {}",self.pixel_reg); log::trace!("Fetching pixel base reg {}",self.pixel_reg);

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@@ -1,8 +1,10 @@
use crate::emu::iomem::MemoryMappedIO; use crate::emu::iomem::MemoryMappedIO;
use crate::emu::mem::RamMemory; use crate::emu::mem::RamMemory;
// 8 bytes that are memory mapped i/o
pub const MMAPPEDIO_END: u32 = RAM_MEM_START-1; pub const MMAPPEDIO_END: u32 = RAM_MEM_START-1;
pub const RAM_MEM_START:u32 = 8; pub const RAM_MEM_START:u32 = 8;
/// Last index of ram
pub const RAM_MEM_END: u32 = 2<<24 - 1; pub const RAM_MEM_END: u32 = 2<<24 - 1;
/// ///

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@@ -1,5 +1,4 @@
pub mod cpu; pub mod cpu;
pub mod mmu; pub mod mmu;
pub mod mem; pub mod mem;
mod endian;
pub mod iomem; pub mod iomem;

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@@ -5,6 +5,7 @@ use crate::emu::mmu::{Memory, MappedMemory};
mod emu; mod emu;
mod args; mod args;
mod misc;
fn main() { fn main() {
SimpleLogger::new().init().unwrap(); SimpleLogger::new().init().unwrap();

18
src/misc/endian.rs Normal file
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@@ -0,0 +1,18 @@
use byteorder::{BigEndian, ByteOrder};
pub struct MemoryOperations();
impl MemoryOperations {
/// read a 24bit endian value, and place it in a u32 num
pub fn read_big_endian_u24(input: &[u8; 3]) -> u32 {
BigEndian::read_u24(input)
}
pub fn read_big_endian_u16(input: &[u8; 2]) -> u16 {
BigEndian::read_u16(input)
}
/// Write 24-bit endian number into slice
pub fn write_big_endian_u24(input: u32, output_slice: &mut [u8; 3]) {
BigEndian::write_u24(output_slice, input);
}
}

1
src/misc/mod.rs Normal file
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@@ -0,0 +1 @@
pub mod endian;